Hi,
I am currently evaluating SDE 4.2 for VS so to generate C++ code.
I am trying to do a simple “helloworld” tutorial in order to test the code generation and try to tackle the reverse engineering features.
I saw some tutorial videos on this site but I still have wonders…
Here is my example (see attached image for illustration):
[u]Class Diag[/u]
Class A = class Hello
Class B = class SIG
[u]State Machine Diag[/u]
Init → State1
State1: when SIG received, then Hello.print(“Hello world!”); → loop back to State1.
Then my questions are:
- How is it possible to specify in the Class Diag that the class SIG shall be a signal (like stereotype or…) ?
- I can’t create a port on my Hello class to specify the required field (SIG). Where shall I specify this port ?
3)I know that states have some entry,do,exit fields. Then, how sould I organize the State Machine Diag to complete my example? - When I will generate my C++ code, where can I find the code implemented for the signal? ie how a signal modelized in UML is translated into C++ code?
add.PNG