VP UML and smaller real time systems

Hi all!

I am currently developing an embedded system which includes an RTOS and tries to use VP UML as design aid.
There will 5-6 tasks which will be described with state machine diagrams where the transitions will be triggered by events from other tasks and hardware. So far so good.

But how can I make a consistent model where I can follow the event and signal flow through the system?

What I want to see is a diagram showing the overview of my task division and the events and signals as arrows between the tasks.
Preferrebly I would like to bundle signal arrows to don’t mess up the diagram too much.
My state machines should be connected as sub diagrams to each task.
I don’t bother if the parent diagram showing the tasks is an object, class, component or whatever diagram.
The important thing is that I can follow all events signal between the state machines via the parent diagram.

Anyone who can help me with this?

Best regards,
Mattias

Hi Mattias,

Thanks for your post and I’ll check with our engineers.

Best regards,
Lilian Wong

Hi Mattias,

I’m sorry that we do not support trigger other tasks on state machine diagram, but we plan to support this in VP Suite 4.3. We will keep you posted for any further news on this issue.

Best regards,
Lilian Wong